Most chip startups talk about architectural licenses or transistor density. Calligo Technologies is talking about a different number system. The Bengaluru-based company, founded in 2012, has taped out and shipped its first silicon, an eight-core RISC-V application processor called TUNGA. Its primary differentiator is not the core count or the open-source instruction set, but its implementation of the POSIT number format, a proposed alternative to the industry-standard IEEE floating-point arithmetic that dominates high-performance computing and AI [PRNewswire, June 2024].
A hardware wedge in RISC-V and POSIT
Calligo's bet is that pairing the open, licensable RISC-V architecture with POSIT-based acceleration creates a more efficient compute substrate for specific, data-intensive workloads. The company sells TUNGA as an accelerator card that plugs into servers running standard x86, ARM, or PowerPC processors, targeting verticals like life sciences, oil and gas, and climate modeling where precision and power efficiency are critical [Inc42, 2026]. Beyond the chip, Calligo offers a suite of professional services,application parallelization, accelerator enablement, architecture evaluation,that suggests a hybrid hardware-and-consulting model to drive adoption [CB Insights]. This positions the company not just as a fabless semiconductor vendor, but as a systems integrator for enterprises and research institutions looking to modernize legacy HPC infrastructure.
Traction and funding on a deeptech timeline
Operating on a capital-efficient, venture-scale timeline unusual for hardware, Calligo has raised approximately $2.67 million to date [Scribd, April 2025]. A $1.1 million pre-Series A round closed in April 2025, led by Seafund, with participation from Artha Venture Fund, KITVEN, UST, and SemiconIndia's futureDESIGN DLI initiative [Finsmes, April 2025]. The funding has supported the development and initial shipment of TUNGA version 1.0 to early customers for real-world testing [AngelOne, 2026]. The company claims collaboration with U.S. universities and national labs, a signal of technical validation within the academic HPC community that often serves as a precursor to broader commercial adoption.
The company's disclosed funding rounds illustrate a measured, milestone-driven approach.
Seed (prior to 2025) | 1.57 | M USD
Pre-Series A (Apr 2025) | 1.1 | M USD
The competitive landscape and scaling risks
Calligo does not operate in a vacuum. Its success hinges on convincing engineers to adopt a non-standard numerical format in a stack already dominated by CUDA, AMD's ROCm, and a growing ecosystem of AI-specific silicon from giants like NVIDIA and a host of startups. The technical value proposition of POSIT,potentially higher dynamic range and accuracy with fewer bits for certain workloads,is academically sound but requires significant software retooling. Calligo's early market wedge appears to be through its services arm, helping customers port and optimize applications for its architecture. This creates a classic services-to-product funnel, but it is a labor-intensive path to scale.
The primary challenges for Calligo moving forward are not technical feasibility but commercial execution.
- Software ecosystem. Every new architecture lives or dies by its compiler support, libraries, and frameworks. Building a robust software stack around POSIT is a multi-year undertaking that must run in parallel with hardware sales.
- Production at scale. First-pass silicon is a major credibility milestone, but volume manufacturing, yield optimization, and supply chain management present a entirely different set of hurdles, especially for a capital-light startup.
- Market education. Selling a novel numerical format requires convincing CTOs and lead engineers to rethink a fundamental layer of their compute stack, a significant adoption barrier compared to a faster implementation of a known standard.
From an architectural standpoint, the tradeoff is clear. POSIT can offer better accuracy per bit for a range of linear algebra and machine learning operations, which translates to potential power savings and performance gains in targeted scenarios. The catch is that these gains are only realized if the entire software pipeline,from the compiler down to the application,is aware of and optimized for the format. Calligo's initial card-based form factor is a pragmatic choice, allowing incremental adoption without a full server replacement. The real test will be whether the performance deltas demonstrated in labs are compelling enough to justify the engineering cost of integration for production workloads. If the efficiency gains are marginal, the inertia of the IEEE 754 ecosystem will be difficult to overcome.
Sources
- [PRNewswire, June 2024] Calligo Technologies unveils world's first POSIT-enabled RISC-V CPU for general-purpose computing | https://www.prnewswire.com/in/news-releases/calligo-technologies-unveils-revolutionary-worlds-first-posit-enabled-risc-v-cpu-for-general-purpose-computing-302161409.html
- [Inc42, 2026] TUNGA is an eight-core processor based on the open-source RISC-V architecture | https://www.inc42.com/buzz/indian-semiconductor-startup-calligo-unveils-worlds-first-posit-enabled-risc-v-cpu/
- [CB Insights] Calligo Technologies company profile | https://www.cbinsights.com/company/calligo-technologies
- [Scribd, April 2025] Calligo Technologies total funding approximately $2.67 million | https://www.scribd.com/document/854243300/Calligo-Technologies
- [Finsmes, April 2025] Calligo Technologies raises $1.1 million in pre-Series A funding | https://www.finsmes.com/2025/04/calligo-technologies-raises-1-1m-in-pre-series-a-funding.html
- [AngelOne, 2026] Version 1.0 chip shipped to early customers | https://www.angelone.in/blog/calligo-technologies-chip