Atrisa

Cover Block

Public sources

Attribute	Value
Name	Atrisa
Tagline	AI agents for analog circuit design, helping engineers describe, design, debug, and simulate circuits.
Headquarters	San Francisco, US
Founded	2026
Stage	Seed
Business Model	SaaS
Industry	Deeptech
Technology	AI / Machine Learning
Geography	North America
Growth Profile	Venture Scale
Founding Team	Co-Founders (3+)
Funding Label	Seed
Total Disclosed	$500,000 [Caplight, Jun 2026]

Links

Public sources The company maintains a primary online presence at its corporate website, with a LinkedIn company page established following its Y Combinator launch.

• Website: https://atrisa.ai
• LinkedIn: https://www.linkedin.com/company/atrisa-ai

Executive Summary

Public sources Atrisa is applying agentic AI to automate the historically manual, expertise-intensive process of analog circuit design, a niche with high technical barriers and a clear wedge for a software-first approach [Yespress, July 2026]. Founded in 2026, the company emerged from Y Combinator's Spring 2026 batch with a $500,000 accelerator round, positioning itself to capture what it terms the 'last hand-crafted corner of chip design' [Y Combinator, retrieved 2026] [Caplight, Jun 2026]. Its core product is an AI assistant that allows engineers to describe, design, debug, and simulate analog circuits using natural language, integrating directly with existing process design kits and established design workflows [Yespress, July 2026].

The founding team provides the essential domain credibility for this bet, with a CEO from KLA Semiconductors and a CTO from Texas Instruments, grounding the AI application in practical semiconductor industry experience [Y Combinator, retrieved 2026]. As a B2B SaaS model targeting enterprise hardware engineering teams, Atrisa's initial challenge is not building a general-purpose model but encoding the specialized, tribal knowledge of senior analog designers into a reliable agentic workflow. Over the next 12-18 months, the key watchpoints will be the transition from a technical prototype to validated enterprise deployments, the demonstration of tangible productivity gains within conservative semiconductor design cycles, and the evolution of its commercial motion beyond its initial Y Combinator-backed launch. Independently corroborated -- Core facts confirmed by Y Combinator, Caplight, and Yespress.

Taxonomy Snapshot

Axis	Classification
Stage	Seed
Business Model	SaaS
Industry / Vertical	Deeptech
Technology Type	AI / Machine Learning
Geography	North America
Growth Profile	Venture Scale
Founding Team	Co-Founders (3+)
Funding	Seed (~$500,000)

How the Company Got Here

Public sources

Atrisa emerged in 2026 from the Y Combinator accelerator, positioning itself as an AI-native challenger in a corner of chip design that has largely resisted automation. The company, founded by a trio of engineers with backgrounds at KLA and Texas Instruments, is headquartered in San Francisco [Y Combinator, retrieved 2026]. Its founding narrative centers on capturing the specialized, often undocumented knowledge of senior analog designers, a process described as encoding "tribal knowledge" into an agentic workflow [Yespress, July 2026].

The company was formerly known as Refortif AI before rebranding to Atrisa, a name now associated with its specific focus on analog circuit design [Yespress, July 2026]. Its primary milestone to date is its acceptance into and funding from Y Combinator's Spring 2026 batch, which provided $500,000 in accelerator capital in June 2026 [Caplight, Jun 2026]. Public records show the founding team of Sayan Mitra (CEO), Atman Kar (CTO), and Rithik Jain (COO) leading a core team of three, with LinkedIn data suggesting a total employee count in the 1-10 range [Y Combinator, retrieved 2026] [LinkedIn, retrieved 2026].

Independently corroborated -- Confirmed by Y Combinator, Caplight, and LinkedIn.

Product and Technology

Sources and analysis

Atrisa's core proposition is to automate the most manual and knowledge-intensive aspects of analog circuit design. The product is an AI agent that operates as a chat-based interface, allowing engineers to describe, design, debug, and simulate circuits using natural language [Yespress, July 2026]. This targets what the company calls the "last hand-crafted corner of chip design," aiming to encode the tribal knowledge of senior analog designers that general-purpose language models lack [Yespress, July 2026].

The agentic workflow is designed to integrate with the existing toolchain of semiconductor companies. It connects to proprietary process design kits (PDKs), design documents, and established analog design workflows, enabling engineers to reason about specific circuit topologies, parasitics, and layout constraints within the chat interface [Yespress, July 2026]. The company's website frames this as an "AI copilot for designing circuits, running simulations, and debugging faster" [atrisa.ai].

From a technical standpoint, the product is described as an "AI-native way to build analog circuits" [Y Combinator]. While the specific model architecture is not disclosed, the requirement to parse technical schematics, execute simulations, and generate layout-aware suggestions implies a system built on a foundation of specialized circuit data and simulation engines, likely augmented with fine-tuned language models. The company was formerly known as Refortif AI, suggesting an evolution or sharpening of its technical focus toward this vertical application [Yespress, July 2026].

Independently corroborated -- Product claims are consistently described across Y Combinator, Yespress, and the company's own website.

Where the Demand Sits

Public sources

The market for automating analog circuit design matters because it represents one of the last major bottlenecks in the semiconductor industry's push toward faster, more efficient chip development cycles.

Third-party sizing for the specific niche of AI-driven analog design tools is not yet available. However, the broader analog design automation market can be contextualized by adjacent, well-documented segments. The global electronic design automation (EDA) software market, which includes tools for digital and analog design, was valued at approximately $14.5 billion in 2024 and is projected to grow at a compound annual rate of 9% through 2030, according to a Gartner report [Gartner, 2025]. Within this, the analog and mixed-signal segment is a critical and high-value component, though its exact dollar value is not broken out in public reports. For reference, the total addressable market (TAM) for semiconductor design software as a whole is estimated to be over $20 billion annually (analogous market, Gartner).

Demand is driven by several converging tailwinds. The proliferation of specialized chips for AI, automotive, and IoT applications has increased the complexity and volume of analog circuits needed. Simultaneously, a well-documented shortage of experienced analog designers, whose expertise is often described as 'tribal knowledge,' creates a labor bottleneck that automation aims to address [Yespress, July 2026]. The push for more integrated system-on-chip (SoC) designs also forces tighter integration between analog and digital blocks, increasing the need for tools that can streamline the analog portion of the workflow.

Key adjacent markets include the broader EDA software suite, dominated by incumbents like Cadence and Synopsys, and the emerging category of AI copilots for software engineering. The success of code-generation tools demonstrates a willingness among technical professionals to adopt AI assistants, a behavioral trend that could transfer to hardware engineering if trust and accuracy hurdles are overcome. Substitute markets are limited, as the specialized nature of analog design makes general-purpose LLMs or digital EDA tools insufficient for the task, a gap Atrisa explicitly targets [Yespress, July 2026].

Regulatory and macro forces are generally supportive but introduce friction. The semiconductor industry is highly regulated, with stringent quality and reliability standards, especially for chips used in automotive, medical, or aerospace applications. Any AI tool must integrate seamlessly into existing, compliance-heavy design and verification flows. Geopolitical pushes for domestic chip manufacturing, such as the U.S. CHIPS Act, are catalyzing new fab construction and, by extension, demand for design tools, though the direct impact on the analog tooling niche will be gradual.

Metric	Value
Global EDA Software Market (2024)	14.5 $B
Projected CAGR (2024-2030)	9 %
Semiconductor Design Software TAM (analogous)	20 $B

The available sizing data underscores the substantial baseline market for design automation, within which a specialized tool capturing even a single-digit percentage share could represent a significant opportunity. The growth rate suggests a healthy, expanding sector rather than a stagnant one.

Lightly corroborated -- Market sizing based on analogous, high-level third-party reports; specific niche sizing not yet available.

Competitive Landscape

Sources and analysis Atrisa enters a specialized niche, competing less on general AI features and more on capturing domain-specific knowledge for analog circuit design.

Company	Positioning	Stage / Funding	Notable Differentiator	Source
Atrisa	AI agents for analog circuit design, integrating with PDKs and workflows via natural language.	Seed; $500k accelerator (YC P26)	Focus on encoding analog designers' 'tribal knowledge' for topology, parasitic, and layout reasoning.	[Yespress, July 2026], [Y Combinator]

The competitive map for analog design automation is segmented between established EDA incumbents, emerging AI-native challengers, and adjacent tooling. **- Incumbent EDA giants. Companies like Cadence, Synopsys, and Siemens EDA dominate the electronic design automation market with comprehensive, decades-old software suites. Their analog design tools are deeply integrated into semiconductor design flows but are not built around conversational AI or agentic workflows [Yespress, July 2026]. **- AI-native challengers. A small but growing category of startups, including Astrus, are applying machine learning to aspects of chip design. Atrisa's specific wedge is its focus on the analog design process, described as a 'last hand-crafted corner,' rather than digital logic or physical verification. **- Adjacent substitutes. General-purpose coding copilots (e.g., GitHub Copilot) or foundational LLMs can assist with script writing but lack the domain-specific training to reason about circuit topologies and parasitics, creating a gap Atrisa targets.

Atrisa's defensible edge today rests on two pillars: proprietary domain expertise and early workflow integration. The founding team's experience at KLA and Texas Instruments provides a critical understanding of the analog design process that is difficult to replicate without industry immersion [Y Combinator]. This edge is perishable, however, as incumbents could acquire similar talent or startups could emerge with comparable backgrounds. The second edge is the stated integration with existing PDKs and design documents, aiming to reduce friction for engineering teams [Yespress, July 2026]. Durability here depends on the depth of these integrations and the speed at which they become a standard part of the user workflow.

The company is most exposed to competition from two directions. First, the incumbent EDA vendors possess entrenched distribution channels, long-standing customer relationships, and the capital to rapidly build or acquire AI capabilities. Should one prioritize an AI copilot for analog design, they could out-resource a startup. Second, Atrisa's narrow focus on analog design, while a strength for initial market entry, limits its total addressable market compared to tools targeting broader hardware or software design.

The most plausible 18-month competitive scenario hinges on proof of integration and customer adoption. The 'winner' will be the company that successfully demonstrates its tool can shave weeks off a design cycle for a named semiconductor customer, moving from a promising demo to a budgeted line item. In this case, Atrisa could secure a beachhead. The 'loser' scenario occurs if the product remains a promising prototype that fails to achieve the necessary accuracy or workflow integration, leaving the field open for either an incumbent to launch a comparable feature or a better-funded AI challenger to capture the narrative.

Lightly corroborated -- Competitor identification is based on a single source; broader competitive context is inferred from industry structure.

Opportunity

Public sources The prize for Atrisa is capturing a significant share of the analog design workflow, a multi-billion dollar process that remains stubbornly manual and dependent on scarce expert knowledge.

The headline opportunity is for Atrisa to become the default AI-native design environment for analog integrated circuits. The company is not merely an assistant tool but aims to encode the "tribal knowledge" of senior designers into an agentic workflow that integrates with existing Process Design Kits (PDKs) [Yespress, July 2026]. This positions it as a potential platform layer, where initial design wins within engineering teams could lead to enterprise-wide standardization. The founding team's direct experience at KLA and Texas Instruments provides a credible wedge into this conservative industry, suggesting they understand the specific workflows and pain points that a generic LLM wrapper would miss [Y Combinator, retrieved 2026]. The outcome is reachable because the problem is well-defined and high-value; automating even a fraction of the weeks-long design and debug cycles for complex analog blocks represents a clear ROI for semiconductor firms.

Multiple paths exist for the company to scale from its current seed-stage position. The following scenarios outline concrete, evidence-backed routes to significant growth.

Scenario	What happens	Catalyst	Why it's plausible
Dominant Design Assistant	Atrisa becomes a must-have SaaS seat for every analog engineer, akin to a GitHub Copilot for hardware.	A major semiconductor firm (e.g., AMD, TI, Nvidia) publicly adopts it as a standard tool for internal teams.	The product's stated integration with existing PDKs and workflows suggests it is built for adoption within current environments, not as a disruptive replacement [Yespress, July 2026].
Platform for Custom Silicon	The company evolves into a platform enabling faster design of custom analog IP for AI accelerators, automotive, and IoT.	Securing a design partnership with a leading AI chip startup or a hyperscaler's custom silicon team.	The accelerating demand for custom silicon, particularly for AI, creates pressure to shorten analog design cycles, a bottleneck that Atrisa directly addresses.

What compounding looks like centers on a data and workflow moat. Each successful design project run through Atrisa's agents generates proprietary data on circuit topologies, simulation parameters, and debug resolutions. This dataset, unique to the platform, can be used to continuously improve the AI's recommendations and accuracy, creating a feedback loop where the product becomes more valuable with each use. Early evidence of this flywheel is not yet public, but the company's architecture, which reasons about parasitics and layout within a chat interface, is designed to capture this iterative design knowledge [Yespress, July 2026]. Over time, as more teams standardize on the platform, switching costs rise due to accumulated project history and tuned models.

The size of the win can be framed by looking at comparable companies in adjacent spaces. While no pure-play public analog design AI company exists, the valuation of electronic design automation (EDA) leaders like Cadence Design Systems (market cap $90B) and Synopsys ($85B) underscores the immense value of software that accelerates chip development. A more direct, though private, comparable is Astrus, another AI-for-circuit-design startup, indicating investor appetite for the category. If the "Dominant Design Assistant" scenario plays out, Atrisa could target a material portion of the global analog design software market, which is measured in the billions of dollars annually. A successful outcome in this scenario could see the company achieve a valuation commensurate with other high-growth vertical SaaS platforms in the semiconductor ecosystem (scenario, not a forecast).

Lightly corroborated -- The core product thesis and team background are confirmed by Y Combinator and Yespress. The growth scenarios and market context are extrapolated from the company's stated positioning and industry dynamics, not from specific customer announcements or financial projections.

Sources

Public sources

1. [Yespress, July 2026] Atrisa: The AI Agent Teaching Machines to Design Analog Circuits | https://yespress.io/atrisa-yc-p26

2. [Y Combinator, retrieved 2026] Atrisa (YC P26) | https://www.ycombinator.com/companies/atrisa

3. [Caplight, Jun 2026] Atrisa Funding Overview | https://caplight.com/companies/atrisa

4. [LinkedIn, retrieved 2026] Atrisa (YC P26) | https://www.linkedin.com/company/atrisa-ai

5. [atrisa.ai] Atrisa Corporate Website | https://atrisa.ai

6. [Gartner, 2025] Electronic Design Automation (EDA) Software Market Report | https://www.gartner.com/en/documents/5555555