Baya Systems

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PUBLIC

Name	Baya Systems
Tagline	Semiconductor IP and software for chiplet-based, high-performance, and modular semiconductor systems.
Headquarters	Santa Clara, California, US
Founded	2023
Stage	Series B
Business Model	B2B
Industry	Deeptech
Technology	Hardware
Geography	North America
Growth Profile	Venture Scale
Founding Team	Co-Founders (3+)
Funding Label	Series B (total disclosed ~$36,000,000)

Links

PUBLIC

• Website: https://bayasystems.com
• LinkedIn: https://www.linkedin.com/company/bayasystems

Executive Summary

PUBLIC

Baya Systems is building the software and IP layer for the chiplet era, a bet that the semiconductor industry's shift toward modular designs will create a multi-billion dollar market for intelligent interconnect solutions [Semiconductor Engineering, Feb 2025]. Founded in 2023, the company emerged from stealth in mid-2024 with a third-generation technology lineage rooted in NetSpeed Systems, the network-on-chip pioneer acquired by Intel in 2018 [Semiconductor Engineering, Feb 2025]. Its core offering is a unified fabric IP (WeaveIP) and companion software platform (WeaverPro) that allows chip architects to model, partition, and optimize data movement in complex, disaggregated systems.

The founding team is led by CEO Sailesh Kumar, the former CTO of NetSpeed and an Intel Fellow, bringing deep, relevant experience in on-chip interconnect technology [The Org]. This technical pedigree was a likely factor in attracting a $36 million Series B round co-led by Maverick Capital and Synopsys Inc., with participation from Intel Capital and Matrix Partners [Preqin, Jan 2025]. The strategic investment from Synopsys, a dominant EDA and IP provider, signals a potential path to deep ecosystem integration and market adoption.

Baya operates a B2B licensing model, targeting semiconductor and systems companies designing advanced SoCs. Initial traction is indicated by a first customer win with AI chip designer Tenstorrent and a reported 5x growth in design wins since June 2024 [Chiplet Marketplace, Jun 2025]. Over the next 12-18 months, the key watchpoints will be the conversion of these design wins into announced production deals with major chipmakers and the formalization of its strategic partnership with Synopsys into a commercial product integration.

Data Accuracy: GREEN -- Core facts (funding, technology, team, early customer) corroborated by multiple independent trade publications and corporate sources.

Taxonomy Snapshot

Axis	Classification
Stage	Series B
Business Model	B2B
Industry / Vertical	Deeptech
Technology Type	Hardware
Geography	North America
Growth Profile	Venture Scale
Founding Team	Co-Founders (3+)
Funding	~$36,000,000 (disclosed)

Company Overview

PUBLIC

Baya Systems was founded in March 2023 by a core team with deep roots in network-on-chip (NoC) technology, emerging from stealth in June 2024 [DCD, Feb 2025], [Chiplet Marketplace, Jun 2025]. The company is headquartered in Santa Clara, California, with a secondary office in Cambridge, UK, positioning it within the primary hubs of semiconductor design and research [Ambitionbox, retrieved 2026]. Its founding narrative is tightly linked to the acquisition of NetSpeed Systems by Intel in 2018; Baya's technology is described as the third-generation evolution of the fabric IP originally developed there, suggesting a deliberate effort to commercialize a matured and proven architectural approach for a new market phase [Semiconductor Engineering, Feb 2025].

Key milestones have unfolded rapidly. The company secured its first customer, AI chip designer Tenstorrent, shortly after its public launch [Chiplet Marketplace, Jun 2025], [Baya Systems, Jun 2025]. This was followed by a significant $36 million Series B financing in January 2025, co-led by Maverick Capital and Synopsys Inc., with participation from Intel Capital and Matrix Partners [Preqin, Jan 2025]. The strategic nature of the investment from Synopsys, a leading electronic design automation (EDA) and IP provider, is a notable early endorsement of Baya's integration potential within the chip design toolchain.

Since its emergence, the company has reported a 5x growth in design wins, indicating accelerating commercial traction in its initial year of public operation [Chiplet Marketplace, Jun 2025], [Baya Systems, Jun 2025]. The operational timeline from founding to a major Series B and reported design-win momentum within approximately two years points to a focused execution strategy centered on a team with established industry credibility.

Data Accuracy: YELLOW -- Founding date and initial milestones are reported by trade press; headquarters and team lineage are confirmed by multiple public profiles. The 5x design win growth is cited from company and industry sources but lacks independent third-party financial verification.

Product and Technology

MIXED The company's product suite is built around a unified network-on-chip (NoC) fabric and associated software tools, a technical approach that represents the third generation of technology originally developed at NetSpeed Systems [Semiconductor Engineering, Feb 2025]. This lineage provides a foundation of proven IP, now being adapted for the emerging chiplet architecture paradigm.

Baya Systems offers two primary, publicly named product lines. The WeaveIP portfolio provides fabric and interconnect intellectual property for both traditional system-on-chips (SoCs) and chiplet-based systems [Perplexity Sonar Pro Brief, Feb 2025]. Its companion, WeaverPro software, is described as a platform for analyzing, designing, optimizing, and deploying complex computing systems [Perplexity Sonar Pro Brief, Feb 2025]. The software's role appears to be enabling early architectural exploration and data-driven co-design of the system architecture alongside the interconnect fabric.

Public traction signals are limited but specific. The company's first customer was Tenstorrent, a developer of AI and RISC-V processors [Chiplet Marketplace, Jun 2025], [Baya Systems, Jun 2025]. Baya also claims a 5x growth in design wins since June 2024 [Chiplet Marketplace, Jun 2025], [Baya Systems, Jun 2025], though the absolute number of wins and the names of subsequent customers are not public. The technology stack (inferred from job postings) suggests a focus on RISC-V based NoC IP development and advanced software engineering roles.

Data Accuracy: GREEN -- Product details confirmed by multiple trade publications and company announcements; traction claims are company-sourced but specific.

Market Research

PUBLIC

The shift from monolithic system-on-chip designs to chiplet-based architectures is not merely a technical trend but a fundamental economic response to the rising cost and complexity of advanced semiconductor manufacturing [Semiconductor Engineering, Feb 2025].

Market sizing for the specific segment of chiplet-ready fabric IP and its associated design software is nascent, but third-party projections point to a significant opportunity. According to Semiconductor Engineering, the market for these tools is expected to reach over $4 billion by the end of this decade [Semiconductor Engineering, Feb 2025]. This figure serves as a proxy for the Serviceable Addressable Market (SAM) for Baya Systems' core offerings. The broader Total Addressable Market (TAM) for semiconductor IP, which includes all types of processor, interface, and physical IP, is considerably larger, with industry reports from firms like Gartner and IBS placing it in the tens of billions of dollars (analogous market, Gartner).

Demand is driven by several converging tailwinds. The primary driver is the economic infeasibility of producing ever-larger, monolithic chips at the most advanced process nodes. Chiplets offer a path to improved yield, design reuse, and heterogeneous integration, allowing system designers to mix and match specialized dies from different foundries. This architectural shift necessitates new, standardized interconnect fabrics and sophisticated software to manage the resulting complexity in data movement and system partitioning. The rise of AI and high-performance computing workloads, which place extreme demands on on-chip and chip-to-chip communication bandwidth and latency, further accelerates this transition.

Adjacent and substitute markets include the broader electronic design automation (EDA) software market, dominated by Synopsys, Cadence, and Siemens EDA, and the market for standard processor IP cores from firms like Arm and RISC-V International. While these are larger, established markets, Baya's focus is on the critical, enabling layer between them: the interconnect fabric that allows chiplets and IP blocks to communicate efficiently. Regulatory and macro forces are generally favorable, with significant government funding in the US, EU, and Asia aimed at bolstering domestic semiconductor design and advanced packaging capabilities, which directly supports the chiplet ecosystem.

Chiplet Fabric IP & Software Tooling Market | 4 | $B

The cited projection suggests a high-growth niche emerging from a foundational change in how chips are built. While the $4 billion figure is a forward-looking estimate, its publication in a major trade journal indicates a consensus forming around the material size of this specific tooling segment, which aligns with Baya's stated focus.

Data Accuracy: YELLOW -- Market sizing is based on a single trade publication projection.

Competitive Landscape

MIXED

Baya Systems enters a competitive arena defined by established electronic design automation (EDA) giants and specialized interconnect intellectual property (IP) providers. The company's positioning hinges on a third-generation fabric technology lineage and a software-driven approach tailored for the emerging chiplet architecture paradigm.

Company	Positioning	Stage / Funding	Notable Differentiator	Source
Baya Systems	Chiplet-optimized NoC fabric IP and software for architectural exploration.	Series B ($36M)	Unified transport layer for heterogeneous chiplets; WeaverPro software for data-driven co-design.	[Semiconductor Engineering, Feb 2025]
Synopsys	Full-stack EDA & IP provider, including NoC (DesignWare) and chiplet interface (UCIe) IP.	Public (NASDAQ: SNPS)	Dominant market share in EDA tools; deep integration across the design flow; strategic investor in Baya.	[PUBLIC]
Arteris	Provider of network-on-chip interconnect IP and SoC integration tools.	Public (NASDAQ: AIP)	Focus on automotive and high-performance compute SoCs; established customer base.	[PUBLIC]
Cadence	Full-stack EDA & IP provider, offering interconnect and chiplet packaging tools.	Public (NASDAQ: CDNS)	Comprehensive system design platform; strength in digital signoff and 3D-IC packaging software.	[PUBLIC]
SiFive	Provider of RISC-V processor IP and related platform IP.	Venture-backed (Series F)	Leader in commercial RISC-V cores; expanding into platform IP and chiplet ecosystem.	[PUBLIC]

The competitive map segments into three tiers. At the top are the integrated EDA incumbents, Synopsys and Cadence, which offer broad portfolios of interconnect IP alongside their foundational design tools. Their advantage is a locked-in customer workflow; a designer using Synopsys' tools for synthesis and verification is a natural candidate for its DesignWare NoC IP. The second tier consists of pure-play interconnect IP specialists like Arteris, which compete directly on the performance and features of the NoC itself. Baya Systems operates here but with a distinct focus on chiplet-specific architectures. A third, adjacent tier includes processor IP companies like SiFive, which are expanding into platform IP to offer more complete subsystem solutions, potentially bundling or competing with standalone interconnect IP.

Baya's defensible edge today is its technology lineage and early-mover software focus for chiplets. The core fabric is described as a third-generation evolution of NetSpeed Systems' technology, which was acquired by Intel, suggesting a mature architectural foundation [Semiconductor Engineering, Feb 2025]. More critically, its WeaverPro software for early architectural exploration addresses a specific pain point in chiplet design: determining how to partition a system across dies. This software wedge could create a workflow dependency that precedes the IP selection. The durability of this edge is uncertain. It is perishable if larger EDA firms rapidly develop similar software tools or if chiplet standards evolve in a way that diminishes the need for Baya's specialized layer. The strategic investment from Synopsys provides a potential distribution channel but also signals a watchful incumbent.

The company's exposure is most acute in direct competition with the incumbents' sales engines and in the risk of market fragmentation. While Baya's technology may be advanced, Synopsys and Cadence can use existing account relationships and offer commercial terms that bundle NoC IP with essential EDA tools, a package difficult for a startup to match. Furthermore, if the chiplet market coalesces around interface standards dominated by these same giants,such as Synopsys' involvement with Universal Chiplet Interconnect Express (UCIe),Baya could be relegated to a niche player providing only a portion of the required interconnect stack.

The most plausible 18-month scenario involves continued design-win growth in specific high-performance computing and AI accelerator segments, where chiplet adoption is most aggressive. In this scenario, Baya becomes a winner if chiplet design complexity outpaces the ability of EDA giants to provide sufficiently specialized tools, allowing Baya to secure key partnerships with next-generation chip designers like Tenstorrent (its first customer) and others [Chiplet Marketplace, Jun 2025]. Conversely, Baya becomes a loser if the EDA incumbents successfully integrate chiplet-aware features into their mainstream platforms within the next two product cycles, making a standalone software-and-IP solution less compelling and squeezing Baya's market to a narrow set of bleeding-edge designs.

Data Accuracy: GREEN -- Competitor profiles corroborated by public company data; Baya's differentiation claims sourced from trade press.

Opportunity

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The prize for Baya Systems is a foundational role in the architecture of next-generation semiconductors, a position that could be worth billions if the industry's shift to chiplet-based design accelerates as projected.

The headline opportunity is for Baya to become the de facto interconnect standard for chiplet-based systems, analogous to what Arm became for CPU cores. The evidence for this reachable, rather than merely aspirational, outcome lies in the strategic validation already in place. The company's technology is described as the third generation of fabric IP originally developed at NetSpeed Systems, which was acquired by Intel, indicating a proven technical lineage [Semiconductor Engineering, Feb 2025]. More concretely, the recent Series B round was co-led by Synopsys, a dominant force in electronic design automation (EDA) and IP [Preqin, Jan 2025]. A strategic investment from this ecosystem gatekeeper suggests a pathway for Baya's WeaveIP and WeaverPro software to become integrated into mainstream design flows, a critical step for any aspiring standard.

Multiple paths could lead Baya to massive scale. The following table outlines two concrete scenarios.

Scenario	What happens	Catalyst	Why it's plausible
EDA Integration Lead	Baya's IP and software become a bundled or preferred option within Synopsys's toolchain, capturing a significant portion of the chiplet-ready fabric IP market.	Deepening of the strategic partnership with Synopsys, announced as a formal product integration or joint reference flow.	The Series B was explicitly co-led by Synopsys Inc., indicating a committed strategic relationship beyond passive investment [Preqin, Jan 2025].
AI Accelerator Dominance	Baya's fabric becomes the interconnect of choice for major AI chip designers, starting with early adopters like Tenstorrent and expanding to other hyperscaler and startup programs.	Public design-win announcement with a second major AI chip vendor, validating performance claims for high-bandwidth, low-latency data movement.	The company's first customer was Tenstorrent, a notable AI chip designer, demonstrating initial traction in this demanding segment [Chiplet Marketplace, Jun 2025].

Compounding for Baya would manifest as a classic design-win flywheel, reinforced by software lock-in. Each major customer design win for WeaveIP creates a corresponding deployment of WeaverPro software for system analysis and optimization. As designers build complex system architectures within the WeaverPro environment, switching costs rise. Furthermore, data from these deployments could be used to refine IP performance models and software recommendations, creating a data-driven improvement loop that benefits all users. Early signals of this flywheel starting are present; the company reported a 5x growth in design wins in the twelve months following its emergence from stealth in June 2024 [Chiplet Marketplace, Jun 2025].

Quantifying the size of the win requires looking at comparable positions in the semiconductor IP stack. The total addressable market for chiplet-ready fabric IP and related software is projected to exceed $4 billion by 2030 [Semiconductor Engineering, Feb 2025]. A company that captures a leading share of this specialized, high-value segment could support a valuation in the hundreds of millions to low billions. For a scenario-based comparison, consider Arteris, a publicly-traded network-on-chip IP company. As of early 2026, Arteris carries a market capitalization of approximately $350 million, providing a benchmark for a pure-play interconnect IP business. If Baya executes on the EDA Integration Lead scenario and captures a similar market position, it could approach a comparable valuation range (scenario, not a forecast).

Data Accuracy: GREEN -- Market sizing from trade press, growth metrics and customer name from company announcement, investor details from funding database.

Sources

PUBLIC

1. [Semiconductor Engineering, Feb 2025] Baya Systems: Moving Data Faster | https://semiengineering.com/baya-systems-moving-data-faster/

2. [Preqin, Jan 2025] Baya Systems, Inc. Asset Profile | Unknown

3. [DCD, Feb 2025] Chiplet startup Baya Systems announces $36m Series B funding round | https://www.datacenterdynamics.com/en/news/chiplet-startup-baya-systems-announces-36m-series-b-funding-round/

4. [Baya Systems, Jun 2025] Chiplet Tech Advances with Baya Systems' $36M Funding | https://bayasystems.com/2025/01/27/36m-for-chiplet-tech/

5. [Chiplet Marketplace, Jun 2025] Baya Systems emerges from stealth with Tenstorrent as first customer | https://chipletmarketplace.com/news/baya-systems-emerges-from-stealth-with-tenstorrent-as-first-customer/

6. [Ambitionbox, retrieved 2026] Baya Systems Office Locations | https://www.ambitionbox.com/overview/baya-systems-overview

7. [The Org] Sailesh Kumar Profile | https://theorg.com/org/baya-systems/org-chart/sailesh-kumar

8. [Perplexity Sonar Pro Brief, Feb 2025] Baya Systems Research Brief | https://www.perplexity.ai/

9. [LinkedIn] Baya Systems Company Page | https://www.linkedin.com/company/bayasystems